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Expected Outcome
- A common hardware library of chiplet building blocks for defence applications.
- Identification and integration of EU-based chiplet technologies into advanced defence systems.
- Demonstrated reduction in development and manufacturing costs through chiplet reuse.
- Improved supply chain resilience by minimizing dependency on generic components.
- Scalable and adaptable SiP designs with modular chiplet integration.
- Feasibility studies detailing performance, power consumption, and security enhancements.
- Defined technical specifications and risk reduction tests for military applications.
- Enhanced cybersecurity measures integrated into the system architecture.
- Detailed supply-chain analysis promoting the use of EU foundries for sensitive components.
- Synergies with ongoing projects in advanced packaging and semiconductor nodes.
Scope
- Exploration of chiplet-based architectures for defence applications.
- Analysis of current state-of-the-art chiplet implementations in processing, signal conversion, and mixed-signal functionalities.
- Evaluation of heterogeneous integration and advanced packaging solutions using EU-based technologies.
- Assessment of cost efficiency, scalability, and low volume production viability.
- Identification of supply chain benefits and strategies to ensure non-dependence on external sources.
- Consideration of power consumption optimization for various defence use cases.
- Integration of cybersecurity features within the proposed System-in-Package designs.
- Ensuring compatibility with harsh environment conditions and compliance with regulatory standards (REACH, ROHS).
- Evaluation of interfaces between chiplets for enhanced modularity.
- Alignment with existing initiatives in advanced semiconductor packaging and Chips JU projects.
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